Volume 8, No. 2,
August 2002

Extreme
Environment Electronics

EEE LINKS
NASA Electronic Parts and Packaging Program

Table of Contents:

Departments

Introduction

Content

(Cryogenic Data Test Reports)

(Low and High Temperature Testing)

(Very High Temperature
SiC Based Packaging)

(General Reports)

(back to cover)

EEE Links Home

NEPP Parts and Packaging Cold Temperature Electronics
Task Team Report and Their Findings

Reza Ghaffarian, NASA JPL

Reza.Ghaffarian@jpl.nasa.gov

A NASA-wide team that has been working on characterization of cold electronics parts and packages reported their findings in an internal JPL report (JPL D-20434). The team collaborated under the NASA Electronic Parts and Packaging Program (NEPP) to characterize electrical and package robustness of newly available (technologies that are available commercially) and advanced (technologies that may soon be available commercially) electronic parts/packages and assemblies under extreme cold environment that represent current and future needs of NASA. Extreme environments are extended nominal operating temperature regimes specified by the manufacturers. Understanding the effects of extended thermal cycling is a long-term process, but it is crucial to evaluate new systems with advanced technologies for future space missions in the context of stringent safety and reliability. Extended thermal cycling in the range of hundreds of cycles is being performed currently, and test results will be presented in a subsequent document. The electronic packages assembled with various parts must be validated over a wide temperature range in order to infuse such technology into future space missions.

Electronic and radio subsystems on the Mars Exploration Rovers (MER), Nanorovers to Asteroid (MUSES CN), Next Generation Space Telescope (NGST), or other NASA missions must be maintained presently at a near constant temperature with heating elements installed as a part of the microelectronic package/system. Heating the electronic system boards requires and consumes a considerable amount of power. Operating such subsystems under ambient conditions experienced on Mars or an asteroid, such temperature controls could be eliminated, providing added flexibility in the overall design of future rovers. Most previous research in the area of low temperature electronics has been highly limited to work on cold temperature of -55 °C for military applications, and a limited amount of work has been done below this temperature, such as the boiling point of liquid nitrogen (-196.6 oC or 76.6 oK) or liquid helium (-269 oC or 4.2 oK) temperatures. Rover electronics and electronic packages would be exposed to ambient temperatures on Mars ranging from -125 oC to +40 oC and on the asteroid Nereus ranging from -180 oC to 100 oC. Perhaps the most vital issue in addressing the effects of cold temperatures on spacecraft electronic packages is the thermal variation associated with exposure to the ambient conditions on the surface of Mars and an asteroid.

Commercial-off-the-shelf (COTS) electronic packages such as Honeywell gate arrays, SRAMs, EEPROM, CMOS operational amplifiers, P channel MOSFETS, N channel MOSFETS, pull up resistors, surface mount resistors, NPO ceramic 0.1 mF capacitors, Harris 8-bit flash converters, high dielectric ceramic capacitors, and printed wiring board (PWB) materials were planned to be used on the Nanorover board for the MUSES CN project. The Nanorover MUSES-CN stands for Mu Space Engineering Spacecraft – C (indicates third in series), and N (indicates NASA). This project was a part of the Japanese mission to an asteroid 4660 Nereus, which involved plans to use electronic parts/packages beyond the envelope given by the suppliers/manufacturers. The MUSES CN group worked with the NEPP Cold Electronics Team to obtain the assessment of both their parts/package and board level assembly needs. The team narrowed their findings to a key task that can be completed within a limited budget, identified several parts/packages, and designed and assembled a board with an SRAM. Temperature cycling ranges were extended by the requirement of MUSES CN to provide meaningful information for other NASA missions.

Wherever possible, the NEPP Cold Electronics Team, which consists of Electronic Parts Project, Electronic Packaging Project, and Electronics Radiation Characterization Projects within JPL and at other NASA Centers provided a comprehensive solution to NASA hardware projects. The primary objective of the NEPP projects is to evaluate newly available and advanced electronic parts/package technologies in order to enable effective support of NASA-wide requirements. Individual tasks funded under NEPP used their respective resources to accomplish overall objectives of the project; this helps shape NEPP activities to not only align with the needs of NASA’s programs and projects, but also to facilitate interdependent work within NASA. The Centers currently involved in this project include Glenn Research Center (GRC), Langley Research Center (LaRC), and Jet Propulsion Laboratory (JPL).

The JPL internal report includes but is not limited to characterization, validation, assessment, and development of test methods/tools for specific parts/packages and assemblies at extreme environments in supporting missions of NGST, MER, and Mars Smart Lander (MSL), etc.

Parts/package and assemblies characterized and reported include the following:

  • RS422 Rad-hard Quad Receivers, HS26C32RH, Linear Technology’s LTC 1419A (plastic), Space Electronics Inc.’s SEI 7872 A/D, Intersil’s HS 9008 RH A/D, and Stanford Microdevices’ SLN 543 IF.
  • Assemblies of three-challenger kit board/package used as part of Quality Assurance JPL Training Center. Assemblies entail several package types, including ball grid array (BGA). A board was designed and built to test Honeywell’s HX6228 SRAM.

Several electrical parameters were characterized at discrete temperatures to -185 °C to determine whether they remain within their specification ranges. Both packages and boards were subjected to nondestructive testing including optical, X-ray, and acoustic microcopy to document their integrity prior to environment exposure. Package/board assemblies were also subjected to X-ray to characterize solder joint integrity, including void levels. Both parts and assemblies were subjected to thermal cycling with a large temperature swing enveloping numerous NASA missions. Details on testing and results are presented.

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