Evaluation of Laminated Flexible Printed Circuit Boards Under Wide Temperature Cycling

Richard Patterson, Glenn Research Center/NASA; Ahmad Hammoud, QSS Group, Inc.; Scott Gerber, ZIN Technologies; James F. Bockman, Robert G. Bryant, Ph.D., Nancy M. Holloway, Langley Research Center/NASA; Reza Ghaffarian, Ph.D., Rajeshuni Ramesham, Ph.D., Jet Propulsion Laboratory

Introduction

Flexible printed circuit boards constitute one of the key technology elements required by NASA for successful development of advanced electrical power and control systems for space applications. The boards have to be lightweight, reliable, and withstand harsh environments. Temperature swings, which are typically experienced in planetary exploration such as Mars, comprise one of such stresses in these missions.

In a collaborative effort between NASA’s Glenn Research Center (GRC), Langley Research Center (LaRC), and the Jet Propulsion Laboratory (JPL) under the NASA Electronic Parts and Packaging (NEPP) Program, the effects of extreme temperature cycling on two flex layups, monitored by capacitance changes, were characterized. It is anticipated that the results of this investigation will further the understanding of extreme temperature effects on the integrity and the functionality of these boards.

Two different flexible printed circuit boards were designed and built by NASA LaRC, each comprising a three-layer laminated structure. The copper clad Langley Research Center Soluble Imide (LaRC-SI) "base-stock" film used to fabricate these circuits consisted of a 2-mil thick LaRC-SI film, thermal-compression bonded to 1 oz. copper foil using an autoclave.  The autoclave was taken to 300 ° C, 100 PSI for 1 hour to consolidate the LaRC-SI film to copper foil, making the clad film.  The clad was patterned using a standard photolithography process and positive artwork.  The copper layer was etched using a sulfuric acid, hydrogen peroxide mixture.  The circuit layers and cover layer were bonded using an autoclave.  During each lamination, the autoclave was taken to 300 ° C, 100 PSI for 1 hour. The via holes in the patterned film layers were formed manually using a 0.040" punch. The holes on circuit #1 were originally filled with solder.  After laminating the circuit layers together, the via holes were then filled with a silver epoxy paste, and an electrical test was performed on the circuits to ensure conductivity between the circuit layers.

The capacitors in these circuits were formed from seven serpentine copper patterns placed on opposite sides of the LaRC-SI flex board. While LaRC-SI material served as the main insulation for both boards (board #1 and board #2), boron nitride¹ was added to a section of the insulation of board #2 in order to facilitate local changes in capacitance by serving to initiate delamination during extreme environmental testing. These boards were delivered to NASA GRC for in-house evaluation under wide temperature cycling. Photographs of board #1 and board #2 are shown in Figures 1 and 2, respectively.

Figure 1. Photograph of Board #1.		Figure 2. Photograph of Board #2.

Test Procedure

The two boards were tested separately, as each was subjected to a different sequence of thermal cycling. The thermal cycle for both boards ranged from –125 ° C to +100 ° C at a rate of 10° C/min. A soak time of 10 minutes was allowed at the two extreme temperatures. The capacitance and dissipation factor of the seven traces were measured at +100 ° C, 25 ° C, and –125 ° C in a frequency range from 200 Hz to 500 kHz. The boards were then visually checked for delamination and other physical damage. After the first cycle, board #1 was subjected to 19 additional cycles totaling 20. Examinations were performed after a total of 1, 3, 5, 10, and 20 cycles. For board #2, dielectric properties were measured only after a total of 1, 3, and 4 cycles.

Results and Discussion

The seven serpentine traces of board #1, which had only LaRC-SI as the insulating material, exhibited similar trends in their dielectric properties with temperature during the first thermal cycle. The capacitance variation with temperature for traces 1 and 7, for example, are shown in Figures 3 and 4, respectively. For simplicity, only the capacitance values measured at 1 kHz are reported in these figures.

Figure 3. Capacitance versus temperature for trace 1 of board #1 @ 1 kHz.		Figure 4. Capacitance versus temperature for trace 7 of board #1 @ 1 kHz.

It is apparent from this data that capacitance decreased in a linear fashion when temperature decreased from 100°C to room temperature and down to –125 °C. The changes experienced in the capacitance of the seven traces with temperature appear to be transient since the capacitance of each trace recovered to its respective room temperature value after thermal cycling was completed. In addition, no structural damage was incurred by the board due to this first cycle as no delamination, breakage, warping, or other physical alteration were observed. After two additional cycles (total of 3), no permanent changes were observed in its electrical or physical characteristics. In fact, no changes were observed after completion of a total of 20 cycles. The "as-built" capacitance test results at intervals up to 20 cycles of all seven traces are listed in Table I at 1 kHz.

Table I. Room temperature capacitance (pF) for board #1 at 1 kHz as a function of thermal cycling.

At the end of the 20 thermal cycles, the board was then subjected to an additional cycle, and dielectric measurements of all seven serpentine traces were taken at 100 ° C, 25 ° C, and –125 ° C. As an example, the data for trace 5 during the 21^st cycle are plotted and compared to that of the first cycle (Figure 5). It can clearly be seen that this trace, like the others on board #1, maintained the same trend in its dielectric characteristics with temperature and frequency throughout the cyclic exposure. It can be concluded that, under this limited thermal cycling process, a total of 21 cycles in the temperature range of 100 ° C to –125 ° C, the printed circuit board #1 showed no apparent electrical or physical degradation.

Unlike board #1, not all seven traces of board #2 have displayed the same trend in their dielectric properties with change in temperature. While traces 1 through 4 have exhibited similar characteristics to those for board #1, the traces 5 to 7 exhibited the same behavior only at the low temperature. Figure 6 and 7 show dependence of the capacitance on the test temperature for traces 1 and 7, respectively. It can be seen that while the capacitance of trace 1 exhibited an increase from room temperature to 100 ° C, the capacitance of trace 7, did not increase as much when the temperature reached 100 ° C. Similar to that of trace 7, the capacitances of traces 5 and 6 did not change significantly from their room temperature values to the test temperature of 100 ° C. It is important to point out that the section of the board, that includes traces 5, 6, and 7 (appears to be cloudy and opaque in Figure 2), contained boron nitride.¹ It is postulated that the addition of the boron nitride might have resulted in stabilizing the capacitance of these traces at the high temperature. Nonetheless, this board did not undergo any permanent changes after one thermal cycle.

Figure 6. Capacitance versus temperature for trace 1 of board #2 @ 1 kHz.		Figure 7. Capacitance versus temperature for trace 7 of board #2 @ 1 kHz.

Board #2 was then subjected to two additional cycles, followed by full examination of its physical integrity and measurement of the capacitance of the seven serpentine traces. Once again, no permanent changes were observed in its electrical or physical characteristics. The "as-built" capacitance data along with those after 1 and 3 cycles are shown in Table II at 1 kHz.

Table II. Room temperature capacitance (pF) for board #2 at 1 kHz as a function of thermal cycling.

At the end of the 3rd cycle, the board was subjected to one additional cycle for dielectric measurements of all seven serpentine traces at 100 ° C, 25 ° C, and –125 ° C. The data for trace 5, for example, during this 4^th cycle are plotted and compared to those of the first cycle in Figure 8. It can be seen that this trace maintained almost the same trend in its dielectric characteristics with temperature and frequency throughout thermal cycling. The other six serpentine traces also maintained their respective trend in these properties as a function of both the temperature and frequency. Thus, it can be concluded that this limited thermal cycling exposure, (4 cycles) in the temperature range of –125 ° C to 100 ° C, produced little or no effect on the electrical or physical characteristics of the flexible printed circuit board #2.

Conclusion

Two flexible printed circuit boards were characterized in terms of their dielectric properties and physical structure under thermal cycling in the temperature range between –125 ° C and +100 ° C. Each board had a three-layer structure of LaRC-SI insulating material with seven serpentine-shape copper traces sandwiching the board between them. While both boards had LaRC-SI polyimide as the base insulation, half of board #2 included also boron nitride as an additive. The results indicate that this limited thermal cycling produced no permanent effect on the physical integrity and the dielectric properties of either board. Only temporary changes occurred in the capacitance and dissipation factor of the boards at the extreme temperatures. While the addition of boron nitride to the polyimide does not have any effect on the dielectric loss of the insulation; it tends, however, to stabilize the capacitance at high temperatures. Long term thermal cycling and aging as well as comprehensive testing are required to fully understand the behavior of these flexible printed circuit boards under multi-stress conditions to determine their suitability for use in extreme temperature environments.

Acknowledgments

This work was performed under the NASA Glenn Research Center GESS Contract # NAS3-00145, and the NASA Electronic Parts and Packaging (NEPP) Program. The authors would like to acknowledge Gregory K. Draughon (for making the LaRC-SI films), Michael C. Holloman (for flex board layout), and Ralph M. Stephens (for flex board patterning).