Abstract:
This task will research, develop, and implement a series of designs in Virtex II FPGAs that allow for detailed functional testing that can then be related to long-term reliability and product qualification of the FPGAs. This series of experiments will also take advantage of hardware and software developed as part of FY05 NEPP tasks.
The development effort will focus on designs that allow for the study of two main parameters, t_pd stability and clock skew. These two parameters are basic to all modern FPGA designs.
They also are sensitive to changes at the more fundamental device physics level, including inverter leakage, NBTI and interconnect capacitance. Because of this sensitivity, a quantitative tie-in between device physics parameters and overall design qualification can be made.
Technologies from 90nm to 0.6um are presently available. Our plan is to purchase Xilinx products from the Spartan and Virtex families that allow us to cover several different generations.
|
Your Path: Home
»
Parts
»
Parts Experts
