Abstract:
A decrease in the low-current gain as a result of exposure to reverse emitter-base voltages is considered as one of the major degradation mechanisms in silicon BJTs and has been also revealed in SiGe technology transistors. According to the existing models this degradation is due to generation of recombination centers at the Si/SiO2 interface in the emitter-base oxide spacer and might be accelerated at low temperatures causing failures of analog and mixed-signal devices at cryogenic temperatures. Reverse bias degradation depends on design and materials used, increases as the size of transistors shrinks, and should be evaluated for all devices intended for low-temperature operation conditions.
In this work reverse bias degradation of SiGe NPN transistors manufactured by BiCMOS 0.35 ƒÝm technology with different size of emitter contacts has been studied at room temperature, +125 oC, -40 oC, and ¡V196 oC. Transistors were stressed at open collector conditions and E-B voltages varying from 2.5 V to 4.5 V during up to 1200 hrs in some cases. The results allowed for assessment of accelerating factors of degradation and prediction of long-term reliability of the devices. A non-ideality factor of transistors degraded at cryogenic temperatures was anomaly high, suggesting that different mechanisms are responsible for degradation of the transistors at room and cryogenic temperatures.
Related Project(s):
EPAR (Electronic Parts)
Related Area(s) of Emphasis:
Extreme Environment Electronics and Packaging
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