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07-100 Sheldon_JPL Distrub Testing in Flash Mem.pdf
File Name: 07-100 Sheldon_JPL Distrub Testing in Flash Mem.pdf | Date Submitted: 05/20/08
 

File Size:
676KB
Document Author
Doug Sheldon - Douglas.J.Sheldon@jpl.nasa.gov
Jet Propulsion Laboratory
Phone: 818 393-5113 | FAX: None On File
[Additional User Information]

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Description:
 
Abstract:
2Gb NAND flash devices were tested for sensitivity to both program and read disturb conditions. This disturb testing is part of the overall reliability evaluation of these devices for use on NASA missions. Radiation evaluation for these devices has already been documented [Irom]. Disturb testing is designed to study the robustness of the data storage of the flash cells when the state of a nearby cell is being changed, either through programming or reading. A disturb failure means that the initial (and expected) state of the cell has been changed (disturbed) to the opposite state as a result of programming or reading the nearby cells. Disturb failures are usually soft failures that require additional device commands to repair. Flash manufacturers acknowledge disturb failures can occur on their devices and try to provide users with guidance on how to address them. For the high reliability nature of NASA missions, a quantitative understanding of the possible degree of disturb failures is required. Such quantitative understanding will guide device screening and procurement requirements as well as possible system mitigation implementations.
 
Related Project(s):
 
Related Area(s) of Emphasis:
High Performance Processor and Memory Technologies
Advanced and Emerging Technologies

 
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