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The High-Speed Potential of Multi-Chip Modules Built with Pico-Substrates
File Name: AnalogAnti.pdf | Date Submitted: 09/17/01
 

File Size:
47KB
Document Author
Jeannette Plante - jfplante@pop500.gsfc.nasa.gov
Goddard Space Flight Center
Phone: None on File | FAX: None On File
[Additional User Information]

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Description:
EPAC FY98
 
Abstract:
In as much as the signal propagation delays between chips or dice are a function of chip interconnection length, multi-chip modules have an inherent advantage over any other form of packaging. However, the full speed potential of multi-chip modules can only be realized to the degree that the electrical quality of the actual interconnects approaches the quality of ideal transmission lines, for which the signal propagation speed is equal to the speed of light. This paper will investigate the transmission line capabilities of multi-chip module substrates in general and that of present and future Pico-strates in particular. Major areas to be considered are the dielectric between the conductors, the resistivity of the conductors, and the configuration-dependant increases of the natural inductances and capacitances in the interconnect system. In parallel, it will be attempted to provide a signal propagation model so that the speed of a substrate with a particular interconnect configuration can be reasonably well predicted by simulation before it is built and tested.
 
Related Project(s):
EPAC (Electronic Packaging)
 
Related Area(s) of Emphasis:
Substrates and Embedded Passives Technologies
Advanced Interconnect Reliability

 
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