Abstract:
A JPL-led CSP Consortium of enterprises, composed of representing government agencies and private companies, recently joined together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects. Since last year, more than 150 test vehicles, single- and double-sided multilayer PWBs, have been assembled and are presently being subjected to various environmental tests. Recent reliability data, specifically the impact of assembly underfill on reliability, is being presented in another paper in this conference. This paper presents lessons learned on assemblies at three facilities with high, low, and ultralow volume production.
Related Project(s):
EPAC (Electronic Packaging)
Related Area(s) of Emphasis:
Advanced and Emerging Technologies
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