Abstract:
The shift in emphasis to smaller, better, and cheaper spacecraft, resulting from the NASA New Millennium Program (NMP) and similar initiatives in DoD-sponsored programs, demands highly innovative designs that standard electronic packaging cannot meet. Current technology primarily uses conventional packaging with surface mounted or through hole components. This approach increases the board size and the overall system weight owing to the larger size of the board and the components mounted on it. Chip-On-Board (COB) technology, where active dice are directly mounted onto a substrate without the need for an intermediate package, provides the basic vehicle to miniaturize electronic hardware. This technology allows the use of both bare dice and packaged components where parts availability, cost and schedule become major factors influencing design decisions. In a cooperative effort between The Johns Hopkins University Applied Physics Laboratory (JHU/APL) Space Department and the Goddard Space Flight Center Code 310 Assurance Technologies Division, a family of miniaturized, stackable electronics modules is under development. These modules can implement anything from a standalone Instrument Processor, to a Command & Data Handling system, or the entire electronics needed by a spacecraft. The small size of these modules makes them ideal for use in small satellites.
Related Project(s):
EPAC (Electronic Packaging)
Related Area(s) of Emphasis:
High Density Packaging Technologies
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