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Printed Circuit Boards

Printed Circuit Boards

Printed Circuit Boards – A NASA Perspective



This webpage is intended to be used as an introduction to printed circuit board (PCB) product assurance information for uses by NASA projects. The NASA Printed Circuit Board Working Group is a cooperative effort between several Agency sites and Agency contracting organizations. Information in the webpage is intended to provide the casual visitor awareness of the PCB assurance challenges NASA recognizes and the approaches being explored or implemented to address those challenges, rather than providing guidelines or technical requirement standards that are to be interpreted as formal policy. This webpage has been prepared by the NASA PCB Working Group.

Introduction to NASA PCB Working Group

The NASA PCB Working Group (PCB WG) is a resource to NASA for printed circuit board technology assessment knowledge and recommendations for printed circuit board quality assurance policy. The group recommends Safety and Mission Assurance requirements for PCBs to the NASA Office of Safety and Mission Assurance via the NASA Workmanship Standards Program. The Working Group also communicates lessons learned and technical recommendations and shares observations on new and altered printed circuit board products among its members and when possible, with the general public through this website. The assessments are performed by weighing the impacts on NASA missions and in some cases, sharing test data.

Introduction to PCBs

PCBs fall into several categories by their form:  rigid, flexible (flex), rigid-flex, and high-frequency.  The vast majority of PCBs used by NASA are of the rigid type.  The flex type is typically used when the board must occupy a non-planar position and typically serves as a replacement for a cable.  Rigid-flex provides rigid boards at one or both ends of the flex board for installing connectors and electrical parts.  High frequency boards are typically used as substrates in multichip modules.

PCBs are generally classified based on the following criteria:

     Dielectric materials used – Epoxy, Bismaleimide Triazine, Cyanate Ester, Polyimide, Polytetraflouroethylene(PTFE), Phenolics, Polyester

     Reinforcement materials – Glass fabric, Kevlar fabric, PTFE fabric, Paper, Polyethylene terephthalate (polyester), Silicon carbide

     Circuit type – Digital, Analog, Mixed, RF, Microwave

     Electronic component solder interfaces – Through-hole, Surface-mount, Mixed-technology, hot air surface levelling (HASL), gold (ENIG, ENIPIG), immersion tin and immersion silver.

     Board construction – Single-sided, Double-sided, Multilayer, Flex, Rigid-flex

     Design complexity – Interconnect circuit density, Interconnect structures (e.g., plated through holes, buried vias), and low, moderate or high manufacturability

      A significant portion of laminate materials used in NASA applications are polyimide based with glass reinforcements. The polyimides have glass transition temperatures upwards of 200°C, coefficient of thermal expansion in out-of-plane direction close to 55 ppm/°C, and in-plane CTE close to 15 ppm/°C. These thermal properties provide a good match with those of the ceramic-bodied microcircuits typically soldered to the boards.  This thermal properties matching reduces stress transferred to the packages' solder joints that accumulates with each thermal cycle, particularly wide delta T's associated with ground-based environmental testing (e.g., -45°C to +85°C).  Epoxy-based laminate materials are used by NASA projects when the thermal conditions of the application allow, such as experiments conducted inside the crewed spaces on the International Space Station.  Typical thermal property values for epoxy-based laminates are a Tg of 150-170°C, an out-of-plane CTE of 50-70 ppm/°C, and an in-plane CTE of 10-15 ppm/°C.

    There are differences in materials, processing steps or both depending on the PCB selected for a particular application.

Table 1 Typical Constituents of PCB Laminate Materials.




Provides mechanical strength and electrical properties (e.g., woven e-glass)

Coupling agent

Bonds inorganic glass with organic resin and transfers stresses across the structure (e.g., organosilanes)


Acts as a binder and load transferring agent (e.g., polyimide)

Curing agent

Enhances linear/cross polymerization in the resin

Flame retardant

Reduces flammability of the laminate (e.g., TBBPA or phosphorous compounds)


Reduces thermal expansion and cost of the laminate (e.g., silica)


Increases reaction rate, reduces curing temperature, controls cross-link density

















What are NASA’s Unique PCB needs?

The PCB materials for space applications are chosen to optimize performance of the final printed circuit board assembly, in many cases, over relatively large swings in temperature, to minimize thermal vacuum outgassing and, to reduce the accumulation of stress over the many thermal cycles and exposures to temperature soaks associated both with ground testing and over the life of the mission. Board materials sets, including the selection of solder masks, via fills and inks is performed to minimize outgassing and need to be appropriately specified, tested and qualified to ensure that they meet the NASA outgassing requirements. The needs are, however, diverse across different NASA Centers because of the variety of mission thrust areas.


Assurance Methods used for NASA PCBs

  • Design Decisions:  Material properties and standard material selections are coupled with design criteria to ensure manufacturability.  There are no minimum NASA technical requirements for PCB design assurance.  Each NASA Center is responsible for ensuring manufacturing readiness for each PCB design, that the design will meet performance requirements and that it will be reliable in the context of the given mission.  The following industry standards are commonly used to guide design for high reliability PCBs:
    • IPC-2221 Generic Standard on Printed Board Design
    • IPC-2222 Sectional Design Standard for Rigid Organic Printed Boards
    • IPC-2223 Sectional Design Standard for Flexible Printed Boards
    • IPC-2225 Sectional Design Standard for Organic Multichip Modules (MCM-L) and MCM-L Assemblies.
  • Supplier Quality:  Over 100 different printed circuit board companies have at one time or another, supplied product that has been intended for use in NASA missions.  Not all of these companies are expert in the same range of technologies and products and careful supplier risk assessment is necessary to ensure orders are placed with companies who can readily deliver verified high-quality product without multiple rebuilds.  There are no specific minimum technical requirements that are unique for assuring PCB quality imposed at the Agency level.  There are minimum requirements that are unique to each NASA Center. Each NASA Center is responsible for ensuring PCB manufacturers used, or used by their prime contractors and system developers, are capable of complying with the minimum generic quality control requirements identified in NPD 8730.5, NASA Quality Assurance Policy.  Each NASA Center must also determine how to apply PCB subject matter expertise towards supplier risk assessment and mitigation.  The IPC, NADCAP, the DoD (see MIL-PRF-31032) and the European Space Agency (ESA) each operate processes that evaluate supplier capability with respect to their own PCB standards or audit checklists.  These organizations maintain lists of suppliers who have demonstrated compliance to those standards and met minimum audit criteria.  Many high reliability system developers will qualify PCB suppliers based on their demonstrated ability to comply with the following technical standards:
    • MIL-STD-55110, Performance Specification, Printed Wiring Board, Rigid, General Specification for
    • MIL-PRF-31032, Printed Circuit Board/Printed Wiring Board, General Specification for
    • ECSS-Q-ST-70-10C, Space Product Assurance - Qualification of printed circuits boards
    • IPC A-600,  Acceptability of Printed Boards (Class 3 requirements)
    • IPC-6011, Generic Performance Specification for Printed Boards, Class 3
    • IPC-6012, Qualification and Performance Specification for Rigid Printed Boards, Class 3 (Some NASA Centers also apply “space” appendix “A")
    • IPC-6013, Qualification and Performance Specification for Flexible Printed Boards, Class 3
    • IPC-6015, Qualification and Performance Specification for Organic Multichip Module (MCM-L) Mounting and Interconnecting Structures
    • IPC-6018, Microwave End Product Board Inspection and Test, Class 3
    • IPC-6012DS, Space and Military Avionics Applications Addendum to IPC-6012D, Qualification and Performance Specification for Rigid Printed Boards  
  • Product Quality:  Specific test procedures and evaluations are used for determining the quality of printed circuit boards made in a given run, lot or panel. Some PCB evaluations are performed visually, others are done through a series of destructive and nondestructive tests.  Nondestructive tests include evaluation of warp, visual examinations for surface defects, and electrical probing to ensure the circuit connections have been correctly realized from the computer aided design (CAD) files that the PCB designer provides to the PCB manufacturer.  Destructive tests are performed on a representative sample called a test coupon.

The test coupons are fabricated on the same panel as the PCB with the assumption that they will fully represent the quality of the PCBs because the test coupon is subjected to the same manufacturing processes and sequences as the PCB. Test coupons are designed for evaluating specific characteristics of the PCB and panels that they represent. Standard test coupon designs and design requirements are defined in the IPC-222x series of standards shown above. Minimum and maximum dimensions for all internal and external features (laminate layers, plating, foils, holes, spacing, etc.) are assessed with the help of structural integrity coupons where the conformance limits are identified in the IPC-601x series of standards listed above.


How does NASA Manage PCB Supply Chain Risks?

Risk management processes enable NASA and its printed circuit board supply chain participants, to systematically analyze, communicate, and mitigate the risk of quality, reliability or performance shortfalls. The process requires development of risk mitigation methods and the implementation of approved strategies to reduce or eliminate the likelihood of quality escapes and failures. Some methods that are used by NASA for managing and mitigating supply chain risk include:

1.    Identifying the risks (for example, risks related to the use of a particular requirement, standard, material, design, facility or fabrication technique).

2.    Assess the risks, analyze to determine risk likelihood (probability) and severity of consequences (impact of degraded performance, for example, interpret the risk due to use of outdated specification, analyze the impact and evaluate the importance of the risk).

3.    Conducting failure modes and effects analysis to identify the modes and failure mechanisms that can affect the functionality of a printed circuit board or assembly.

4.    Planning and implementing solutions after formulating risk management strategies and determining an acceptable level of risk.

5.    Continuous improvement methods that include analyzing re-engineered processes, influencing the specification and standards, benchmarking, tracking, controlling and communicating.

Technical Standards Activities of the NASA Workmanship Program


The NASA Workmanship Program is taking the following actions to develop assurance guidance and requirements that can be applied Agency-wide in the following manner:

1.    NASA PCB Working Group

The NASA PCB Working Group is a resource for printed circuit board technology assessment and provides policy recommendations for printed circuit board quality assurance. The group recommends Safety and Mission Assurance requirements for PCBs to the NASA Office of Safety and Mission Assurance via the NASA Workmanship Program. The Working Group also communicates lessons learned technical recommendations and shares observations on new and altered printed circuit board products. The assessments are performed by weighing the impacts on NASA missions and in some cases, sharing test data.

Current issues being discussed by the NASA WG:

·         Applicability and use of high density interconnects such as stacked µvias and via-in-pad technology in current hardware

CURRENT STATUS (3/2017): Participating in update to IPC-2226.  Reviewing industry data, literature and experiences.

·         Discussions of new laminate materials, i.e.: High Tg, low CTE, selection of via fill materials

CURRENT STATUS (3/2017):  Reviewing manufacturers’ datasheets and published literature.

·         Use of simulated reflow conditions as a method of performing quality screens on coupons containing high density interconnects such as microvias.


CURRENT STATUS (3/2017):  Reviewing design and process conditions to determine, on a case-by-case basis, instances where modified preconditioning conditions may apply.


2.      Contributions to Industry and NASA Technical Standards

When the Working Group lessons learned or recommendations have a strong potential for systematic risk reduction across all NASA Projects, the Working Group provides related information to standardizing bodies, such as the IPC, in the form of a design rule, material recommendation, or a manufacturing or quality inspection/acceptance requirement. Once published in a technical standard the guidance, requirement, or the standard as a whole, can be referenced and imposed by NASA hardware developers in their procurement contract statements of work, in purchase orders or other procurement vehicles where technical requirements are established.

3.      Independent Technical Evaluations

Routinely NASA Centers conduct independent technical evaluations on printed circuit board materials, designs, and fabrication principles in an attempt to learn how to maintain control over all of the factors that may affect the quality and reliability of PCBs used in missions. Using an experimental design approach enables the NASA Center to test the hypothesis by reaching valid conclusions about relationships between, for example design specifications, magnitudes of applied stress and reliability, or between any other independent and dependent variables. Some examples of ongoing or recently completed independent studies are provided below.

a.      Copper Wrap Plating Requirements

Experimental and simulation work was performed by GSFC in cooperation with the NASA Workmanship Standards Program and the NASA Reliability Engineering Program, to understand the reliability implications of design and manufacturing conditions in printed circuit boards that result in less than the industry standard-specified amount of copper wrap plating found in IPC 6012B 3/A. Temperature cycling and thermal shock tests on test coupons fabricated with polyimide and FR4 materials suggest that copper wrap thickness is not a dominant failure site in PTH geometries. Destructive physical analysis of test coupons from interconnect stress testing (IST), which was performed at stress levels far exceeding any reasonable qualification level, suggests that the failure sites are located in the barrels, away from the copper wrap plating location. Software simulation also confirmed the IST test observations.

The study further showed that procurement requirements for wrap plating thickness from IPC-6012 Class 3 to Class 2 would pose little risk to reliability. Experimental results corroborated by modeling indicate that the stress maxima are internal to the barrels rather than at the wrap location.

b.      Internal Annular Ring (IAR) Requirements (Ongoing)


The goal of the test plan is to design-in variations in the internal annular ring geometries in printed circuit boards and correlate the effects of these variations to risk of PCB failure in relevant test and mission environments for earth-orbiting robotics missions. Reliability tests such as temperature cycling and mechanical flexure will be conducted on test samples constructed with controlled IAR widths, sub-optimal IAR widths and other configurations such as teardrops. This work will seek to discover if IAR should be between 1 mil and 2 mils, similar to IPC 6012C 3/A specifications, whether it can be lower than 1 mil (0.5mil), or when in a teardrop configuration it need not be controlled with a minimum dimension without loss of reliability.



For further information, contact Bhanu Sood, email: or by phone (301) 286-5584