To download an archive of all MAPLD 2009 materials (ZIP file, 250MB) - Click HERE
Monday - 8/31/2009 (Seminars)
7:30 -9:00 Registration
9:00-9:05 Seminar Introduction
Tim Gallagher, Lockheed Martin
9:05-9:50 DO-254 Overview, Pro’s, Con’s, and Discussion
Michelle Lange, Mentor Graphics
9:50-10:40 Packaging Concerns/Techniques for Large Devices
Michael Sampson, NASA Goddard Space Flight Center
10:40-11:30 OPERA RHBD Multi-Core
Michael Malone, Draper Labs
11:30-1:00 Lunch
1:00-1:50 CHREC Novo-G
Alan George, University of Florida
1:50-2:40 Micro/NanoSats/SpaceCube
Steve Suddarth, Configurable Space Microsystems Innovations & Applications Center (COSMIAC)
2:40-3:00 Break
3:00-3:50 Memory Technology for Space
Ian Troxel, SEAKR Engineering
3:50-4:40 Tools for FPGA SEU Mitigation/Fault Tolerance
Heather Quinn, Los Alamos National Laboratory
4:40-5:00 Questions and Answers
  
Tuesday - 9/1/2009 (Session A and B)
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7:30 -9:00 Registration
9:00-9:20 Conference Welcome
Orlando Figueroa, NASA Goddard Space Flight Center

 Session A
9:20-9:40 Using a FLASH Based FPGA in a Miniaturized Motion Control Chip
Sandi Habinc
9:40-10:00 Implementation of a Sigma Delta Analog to Digital Converter in an RTAX FPGA
Doug Cornelsen
10:00-10:20 Architectural Tradeoffs for CCSDS Formatting and High Speed SSR Interface
John Dickinson
10:20-10:40 Break
10:40-11:00 Reliable Synchronization for Multi-Hop Networks and its Realization in FPGA
Wilfried Steiner
11:00-11:20 Hardware Implementation of a Novel Method for Reducing Sensor and Readout Electronic Circuitry Noise in Digital Domain
Thomas Kong
11:20-11:40 On DESTINY Science Instrument Electrical and Electronics Subsystem Framework
Semion Kizhner
11:40-12:00 Versatile board to study the in-orbit radiation effects on microelectronics components
David Guzman
12:00-1:30 Lunch
1:30-1:50 Application of SpaceCube in a Space Flight Systems - also available: Handout version
Accompanying movie clips: Video 1  -  Video 2  -  Video 3
David Petrick

 Session B
1:50-2:10 Universal Reconfigurable Translator Module (URTM)
Edward Leventhal
2:10-2:30 FPGAs, Scaling and Reliability
Douglas Sheldon
2:30-3:15 Industrial Exhibits Introductions (Building 8)
3:15-6:00 Industrial Exhibits (Building 28 Atrium) – Light refreshments provided by Actel Corporation
  
Wednesday - 9/2/2009 (Session B and C)
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Session B
8:00-8:20 Non Hermetic Ceramic Flip Chip Package Reliability Assessment
Gerry Maloney
8:20-8:40 FLASH Mitigation Strategies and Tradeoffs
Charlie Howard
8:40-9:00 Maximizing the Robustness of Applications using Advanced Reconfigurable FPGAs in Upset Environments
Gary Swift
9:00-9:20 Actel Power Supply Transient Evaluation on RTAX-S and RTSX-SU Devices
Solomon Wolday
9:20-9:40 Fully TID-Hardened Space Wire/Gigabit Ethernet SerDes Based On A Proprietary Library Of SCL Cells.
Vladimir Katzman
9:40-10:00 Break

 Session C
10:00-10:20 Reconfigurable, High Density, High Speed, Low Power, Radiation Hardened FPGA Technology
Shankarnarayanan Ramaswamy
10:20-10:40 A Programmable Configuration Scrubber for FPGAs
G. Alonzo Vera
10:40-11:00 Synchronization Issues of TMR Crossing Multiple Clock Domains
Yubo Li
11:00-11:20 Preliminary Analysis of a soft-core processor in a Rad Hard By Design Field Programmable Gate Array
Gregory Miller
11:20-11:40 Low-Cost High-Performance Reprogrammable Processors for Space-Based Applications
Nathaniel Rollins
11:40-12:00 Initial Dose Rate Testing of the SIRF FX-1
Joseph Fabula
12:00-1:30 Lunch
1:30-1:50 Interaction of Ionized-Particles with Advanced Signal Processing Devices in Field-Programmable Gate Arrays and Development of Mitigation Techniques for Space Applications
Roberto Monreal
1:50-2:10 Embedding Asynchronous FIFO Memory Blocks in Xilinx Virtex Series FPGAs Targeted for Critical Space System Applications
Melanie Berg
2:10-2:30 A SET Resistant Majority Voting Circuit
John Cochran
2:30-2:50 Radiation Performance of Embedded CoreABC Controller on the New Radiation-Tolerant
Sana Rezgui
2:50-3:10 ATMEL ATF280E Rad Hard SRAM Based FPGA: SEE test results and fault injection
Bernard Bancelin
3:10-6:00 Poster Session/Industrial Exhibits (Building 28 Atrium)
  
Thursday - 9/2/2009 (Session D and E)
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 Session D
8:8:00-8:20 Can Assertions Save Military PLD Designs?
Jaroslaw Kaczynski
8:20-8:40 DO-254 Trends and Efficient Methods for Hardware Verification
Igor Tsapenko
8:40-9:00 DO-254: Reliability, Cost and Payoff
Steven Suddarth
9:00-9:20 Formal Verification of Advanced Synthesis Optimizations
Anantkumar Jain
9:20-9:40 Modular Design of FPGA-Based Accelerators in C
Walid Najjar
9:40-10:00 DSP development and verification issues with Matlab generated RTL
Ely Soto
10:00-10:20 Break
10:20-10:40 RTL and Synthesis Design Approach to Radiation-Harden and Fail-Safe Targeted Applications
Buu Huynh
10:40-11:00 Simple Portable FPGA Fault Injector
Grzegorz Cieslewski
11:00-11:20 Reduced Cost Reliability via Statistical Model Detection
Jon-Paul Anderson

 Session E
11:40-12:00 Fault Tolerant Techniques for System on a Chip Devices
Matthew French
12:00-1:30 Lunch
1:30-1:50 Fault Tolerant LEON Processing, Devices and Circuit Cards
Sam Stratton
1:50-2:10 Run-Time FPGA Partial Reconfiguration for Image Processing Applications
Shaon Yousuf
2:10-2:30 Break
2:30-3:30 Reliability Considerations
Invited Speaker - Dr. Douglas Sheldon, Jet Propulsion Laboratory
3:30-3:40 Break
3:40-4:00 Design of a Radiation Tolerant Computing System Based on a Many-Core FPGA Architecture
Brock LaMeres
4:00-4:20 SpaceCube: Current Missions and Ongoing Platform Advancements - also available: handout version
David Petrick
4:20-4:40 Universal Reconfigurable Processing Platform for Space
Dorian Seagrave
4:40-4:50 Closing Remarks – Wesley Powell, NASA Goddard Space Flight Center
  

Poster Session
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Kaushal Buch Low power architecture and HDL coding practices for on-board hardware applications
Gary Burke Development of FPGA Based Verification Simulation Accelerator
Zhongren Cao PaSiVe: A Design Workflow for Fast Prototyping Innovative Signal Processing Applications on FPGA
Dominic Lucida A Requirements-Driven PLD Design Flow
Mike Delaney Solder Joint Health Monitoring Testbed System
Rajiv Garg Synthesis of fault tolerant circuits for FSMs & RAMs
Ronald Lake Aeroflex Solutions for Stacked Memory Packaging
David Landoll Avoiding Metastability in FPGA Devices
John McDonald Architectural Analysis for Quantifying Trade-offs to Make the Right Decision for Implementation
Kamesh Ramani Vendor Independent SEE mitigation solution for FPGAs
Gary Roosevelt Functional Verification in Space Applications
Hans Schmitz Enabling Security in ProASIC3 FPGAs, with Hardware and Software Features
Ian Troxel Comparison of Single-Event Effect Mitigation Methods using Design Impact and Application Performance Metrics
Igor Tsapenko Re-programmable Prototyping for Actel™ RTAX and RTSX space-flight systems designs