• Power Conditioning

3)  Resistors may be mounted individually on a test board, fiberglass base, and connected to conductor areas by means of solder preforms, conductive cement, or wire bonding.  Users are cautioned that the substrate and chip component must have compatible temperature coefficients of expansion to reduce the strain level imposed on the solder connections.  They may also be directly connected to other components on the same test board by means of wire bonding using the test board as a base or carrier for the resistor.

4)  Stacking of resistors is discouraged since experience indicates that failure may occur due to electrolytic action in the bonding adhesive.  This action occurs from the increase in temperature caused by stacking in conjunction with the operating voltage across the resistor.  The bonding adhesive at the resistor chip interface chemically reacts with the active resistor material changing the noise and resistance values and eventually the resistor will open.  If stacking resistors, care should be taken to compensate for the lower heat dissipation capabilities by derating the wattage rating.

5)  Close tolerance resistors (i.e., ±0.1%) should be mounted on a test board by a method which produces the least heating effect over a short period of time to avoid permanent changes in resistance.

6)  It is recommended that the film side of the resistors be mounted up when they are placed onto printed circuit boards.  This is due to the effect of thermal stressing on epoxies used to hold them in place when mounted on the bottom of printed circuit boards.  Resistor films can be torn from the substrate during thermal cycling, substantially altering the value of the resistor.
 
7) Electrostatic charge effects. Under relatively low humidity conditions, some types of film resistors, particularly those with small dimensions and high sheet resistivity materials, are prone to sudden significant changes in resistance (usually reductions in value) and to changes in temperature coefficient of resistance as a result of discharge of static charges built up on associated objects during handling, packaging, or shipping. Substitution of more suitable implements and materials can help minimize this problem. For example, use of cotton gloves, static eliminator devices, air humidifiers, and operator and workbench grounding systems can reduce static buildup during handling. Means of alleviating static problems during shipment include elimination of loose packaging of resistors and use of metal foil (conductive) and static dissipation packaging materials. Direct shipments to the government is controlled by MIL-DTL-39032 which specifies a preventive packaging procedure.

8)  The RM0302, RM0402, RM0502 and RM0603 chip resistors (per MIL-PRF-55342/13, /11, /12 and /1 respectively) are the smallest chip resistor styles currently available per MIL-PRF-55342. Historically, these smaller chip resistor sizes have not been listed in any NASA parts selection list documents and as such, there is limited NASA experience with their use. For this reason a more conservative approach has been taken regarding their initial listings within the NPSL (i.e., "R" or "S" failure rate level products are listed as Level 2, "T" Level products are listed as Level 1). 

9)  In October 2007 the MIL-PRF-55342 slash sheets 1 through 13 were revised to establish new power and voltage ratings.  These new ratings were coordinated by DSCC amongst all QPL suppliers and the user community beginning in 2005.  All QPL suppliers completed requalification of their products by October 2007 when the new ratings became official.

The following table highlights the old ratings compared to the new ratings.