1. Refer to the detailed part specification for applicable power derating factors.

2. All JANTXV transistors must be PIND tested in accordance with MIL-STD-750, Method 2052, Condition A. Additional testing is not required when procured directly from the manufacturer with PIND testing in accordance with MIL-PRF-19500.

3. For transistors which are available in leaded and unleaded (U designation) configurations, the leaded package (case) is designated. Refer to the detail specification for surface mount (unleaded) package outlines.