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MAPLD 2008 Presentation Downloads

Use these quick links to go to a particular day or session
Monday & Tuesday - Wednesday - Thursday - Poster Sessions

Monday 9/15
Tuesday 9/16

Session A

"Performance Study of Matrix Operations on Homogeneous and Heterogeneous Reconfigurable Computing Systems"
Melissa C. Smith, Clemson University

"A 600-Mb/s (8158,7136) Low-Density Parity-Check Decoder Utilizing a Vertex 4 LX200 FPGA"
Sterling Whitaker, University of Idaho

"Lunar Applications for Reconfigurable Processing"
Companion Paper Available - Click Here
Kevin Somervill, NASA Langley Research Center

"Achieving High Performance Computing and Application Flexibility within the Spacecraft Payload"
Ian Troxel, SEAKR Engineering

"Implementing Image Registration Algorithms on Reconfigurable Computer"
Miaoqing Huang, The George Washington University

"SpaceWiki : Bridging the Research-Application Gap and Enabling a Living Collaborative Environment"
John Demello, United States Air Force

"Secure Software Defined Radio in Space"
Addendum Slides Available - Click Here
Ian Land, John Corbett, Xilinx Corporation

"GPS Receiver for LEO, GEO and Beyond" - Steve Sirotzky, NASA Goddard Space Flight Center

"SpaceCube: A Reconfigurable Processing Platform For Space"
John Godfrey, NASA Goddard Space Flight Center

Lunch - "FPGAs and the Quest for New Relevance of America's Space Program"
Dr. Steven Suddarth, FPGA Mission Assurance Center (FMAC)

"Turbo-coding: Merits of implementation in Actel RTAX FPGA"
Charlie Howard, Southwest Research Institute

"SmartCell Reconfigurable Architecture for Low-Power Stream Processing"
Xinming Huang, Worcester Polytechnic Institute

"Assessment of Proper Bonding Methods and Mechanical Characterization FPGA CQFP Components"
Milton Davis, NASA Goddard Space Flight Center

Session B

"Single Event Effects of Accelerated Terrestrial Cosmic Rays on Ferroelectric RAM"
Lindsay O'Brien Quarrie, New Mexico Tech METTOP

"NESC Actel RTAX-S FPGA Risk Reduction Life Testing" - Brian Smith, Stargazer Systems

"ATF280E Rad-Hard SRAM Based FPGA" - Bernard Bancelin, Atmel Nantes SAS

"RTA3P Qualification Plan" - Marco Cheung, Solomon Wolday, Actel Corporation

"Converting PLD-based SoC into RadSafe(TM) ASIC" - Ran Ginosar, Ramon Chips, Ltd.

"A Comprehensive Skew Analysis of Routed Clocks in Actel's SX32-A" - Parag Shekher, Actel Corporation

"Reconfigurable, High Density, High Speed, Low Power, Radiation"
Shankarnarayanan Ramaswamy, BAE Systems