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MAPLD 2008 Presentation Downloads

Use these quick links to go to a particular day or session
Monday & Tuesday - Wednesday - Thursday - Poster Sessions

Poster Sessions (Thursday 9/18)

Title

Author(s)

Single Event Effects Accelerated Terrestrial Cosmic Rays on Ferroelectric RAM Lindsay O. Quarrie, Syndetix Inc., New Mexico Tech METTOP
An Approach to Common Avionics for Lunar Systems Robert F. Hodson, NASA Langley Research Center.

Retention Projections for SONOS Nonvolatile Semiconductor Memories (NVSMs) Based on Activation Energy Studies
Addendum Slides Available - Click Here

Dennis Adams, Northrop Grumman Corporation

Ultra-High Speed Rad Hard PLD/FPGA Interconnects Technique for the next Generation High Performance on Board Computing

Vladimir Katzman, Jeb Binkley, ADSANTEC Inc.

Low power fault tolerant state machine design using reversible logic gates

Kaushal D. Buch, eInfochips Ltd.

Meeting DO-254 Compliance Requirements

David Lundgren, Aldec, Inc.

Reprogrammable Prototyping for Rad-Hard FGPAs

Igor Tsapenko, Aldec, Inc.

SpaceWire Based Fault Tolerant Architecture for Redundant Systems

Doug Cornelsen, Bristol Aerospace Limited

Reconfigurable Computing in Practice: Demonstrations and Benchmarking for Avionics

Clint Patrick, NASA Marshall Space Flight Center

A breadboard for real time image processing on board Gaia

Shan Mignot, Observatoire de Paris

Optimized Virtex-4 FPGA Self Hosting Configuration Management

Chen Wei Tseng, Xilinx Corporation

Virtex-4 FPGA SEU Mitigation Design Consideration

Chen Wei Tseng, Xilinx Corporation

A Power-Efficient Design Approach to Radiation Hardened Digital Circuitry using Dynamically Selectable Triple Modulo Redundancy

Brock J. LaMeres, Montana State University

A Device-Level Architecture for FPGA Co-Processors in Embedded Computing Platforms

Chris Conger, Honeywell Inc., Space Electronic Systems

A New Radiation Tolerant Field Programmable Gate Array Based on Non-Volatile Flash Configuration Switches

Jih-Jong Wang, Actel Corporation

A Multi-Mode Reconfigurable OFDM Communication System on FPGA
Addendum Slide Available - Click Here

Viktor Prasanna, University of Southern California

FPGA-Based High Altitude Aircraft Systems

Paul Graham, Los Alamos National Laboratory

SET Characterization and Mitigation in RTAX-S Antifuse FPGAs

Sana Rezgui, Actel Corporation

Actel RTAX4000S Space Qualification Update

Solomon Wolday, Actel Corporation

An FPGA-Enhanced Ball Stack Rad-Hard Non-Volatile Memory

Don Hayashigawa, NxGen Electronics Inc

Using Fusion Mixed-signal Programmable System Chips to Implement System Management in uTCA Applications

Ken O’Neill, Actel Corporation

Performance Improvement in FPGA-based Data Acquisition Systems using PCI-Express

Melissa C. Smith, Clemson University

Computational Modeling Using FDTD Methods on Reconfigurable Co-Processor Platform

Xinming Huang, Worcester Polytechnic Institute

An Area-Efficient LDPC Decoder Architecture and Design on FPGA

Xinming Huang, Worcester Polytechnic Institute

Power Conscious Design Methodology for Actel FPGA

Mir Sayed Ali, Actel Corporation

RTAX-S Design Checklist

Min Nguyen, Actel Corporation

Tracing Requirements from the System Level to Subsystem Implementation and Verification with ReqTracer (unavailable for download)

Pete Decher, Mentor Graphics Corporation

Modern Verification Methods for Safety-Critical and DO-254 Compliant FPGA/ASIC Devices

David Landoll, Mentor Graphics Corporation

Constrained Random Verification with VHDL (unavailable for download)

Jim Lewis, SynthWorks Design Inc.

Functional and Performance validation of the 80S32 uC for Space Applications

Stefanos Skoulaxinos, Integrated System Development (ISD)

"Hard real-time operation in Gigabit-Ethernet networks using FPGA-based TTEthernet IP"
Addendum Slide Available - Click Here

Guenter Motzet, TTTech

“Fault Tolerant, Reconfigurable FPGAs in High-Speed Encryption Application”

Edward Li, SpaceMicro